XOR gate

This is a XOR gate made of NOR gates

xor.sim.v

`include "./nor/nor.sim.v"

module XOR (
    input  A,
    input  B,
    output Y
);

    wire S00;
    NOR nor00 (.A(A), .B(B), .Y(S00));

    wire S10;
    wire S11;
    NOR nor10 (.A(A), .B(S00), .Y(S10));
    NOR nor11 (.A(B), .B(S00), .Y(S11));

    wire S20;
    NOR nor20 (.A(S10), .B(S11), .Y(S20));

    NOR nor30 (.A(S20), .B(S20), .Y(Y));

endmodule

The gate model generated by V2X

xor.model.xml

<?xml version="1.0"?>
<models>
  <model name="NOR">
    <input_ports>
      <port combinational_sink_ports="Y" name="A"/>
      <port combinational_sink_ports="Y" name="B"/>
    </input_ports>
    <output_ports>
      <port name="Y"/>
    </output_ports>
  </model>
</models>

The gate pb_type generated by V2X

xor.pb_type.xml

<?xml version="1.0"?>
<pb_type xmlns:xi="http://www.w3.org/2001/XInclude" name="XOR" num_pb="1">
  <input name="A" num_pins="1"/>
  <input name="B" num_pins="1"/>
  <output name="Y" num_pins="1"/>
  <pb_type blif_model=".subckt NOR" name="nor00" num_pb="1">
    <input name="A" num_pins="1"/>
    <input name="B" num_pins="1"/>
    <output name="Y" num_pins="1"/>
  </pb_type>
  <pb_type blif_model=".subckt NOR" name="nor10" num_pb="1">
    <input name="A" num_pins="1"/>
    <input name="B" num_pins="1"/>
    <output name="Y" num_pins="1"/>
  </pb_type>
  <pb_type blif_model=".subckt NOR" name="nor11" num_pb="1">
    <input name="A" num_pins="1"/>
    <input name="B" num_pins="1"/>
    <output name="Y" num_pins="1"/>
  </pb_type>
  <pb_type blif_model=".subckt NOR" name="nor20" num_pb="1">
    <input name="A" num_pins="1"/>
    <input name="B" num_pins="1"/>
    <output name="Y" num_pins="1"/>
  </pb_type>
  <pb_type blif_model=".subckt NOR" name="nor30" num_pb="1">
    <input name="A" num_pins="1"/>
    <input name="B" num_pins="1"/>
    <output name="Y" num_pins="1"/>
  </pb_type>
  <interconnect>
    <direct input="nor30.Y" name="XOR-Y" output="XOR.Y"/>
    <direct input="XOR.A" name="nor00-A" output="nor00.A"/>
    <direct input="XOR.B" name="nor00-B" output="nor00.B"/>
    <direct input="XOR.A" name="nor10-A" output="nor10.A"/>
    <direct input="nor00.Y" name="nor10-B" output="nor10.B"/>
    <direct input="XOR.B" name="nor11-A" output="nor11.A"/>
    <direct input="nor00.Y" name="nor11-B" output="nor11.B"/>
    <direct input="nor10.Y" name="nor20-A" output="nor20.A"/>
    <direct input="nor11.Y" name="nor20-B" output="nor20.B"/>
    <direct input="nor20.Y" name="nor30-A" output="nor30.A"/>
    <direct input="nor20.Y" name="nor30-B" output="nor30.B"/>
  </interconnect>
</pb_type>