Clock

There are various ways for an input or output port to be detected as a clock by v2x. Here are examples on ways to do so.

• Autodetection of clock from flipflop
  • D-Flipflop with one clock
  • D-Flipflop with combinational logic
  • D-Flipflop with two clocks
• Manually set inputs as clock
  • Manually set input as clock by setting the CLOCK attribute
  • Force input as regular input by setting the CLOCK attribute
  • Set input as clock by name (clk)
  • Set input as clock by name (regex)
• Manually set outputs as clock
  • Manually set output as clock by setting the CLOCK attribute
  • Set output as clock by name (clk)
• Multiple clocks
  • Set inputs as clock by name (multiple clock inputs)
  • Set outputs as clock by name (multiple clock outputs)